Digital Electronics for GATE EE

GATE EE includes a compact digital electronics section. This lesson collects what it needs; the Digital Logic track on this site covers the same topics in more depth.

Number systems and Boolean algebra

• Binary, octal, hex conversions; 2's complement for signed numbers (range −2ⁿ⁻¹ to 2ⁿ⁻¹ − 1).
• De Morgan: (AB)′ = A′ + B′, (A + B)′ = A′B′.
• K-maps group 1s in powers of two to minimise sum-of-products expressions; don't-cares can be used as 0 or 1.
• NAND and NOR are universal gates.

Logic families

Noise margins: NM_H = V_OH − V_IH, NM_L = V_IL − V_OL.

Combinational circuits

• Half adder: S = A ⊕ B, C = AB. Full adder: S = A ⊕ B ⊕ C_in, C_out = AB + C_in(A ⊕ B).
• Multiplexer: 2ⁿ inputs, n select lines; any n-variable function can be built with a 2ⁿ:1 MUX (or a 2ⁿ⁻¹:1 MUX with one variable on the inputs).
• Decoder: n inputs → 2ⁿ outputs. Encoder, priority encoder, comparator.

Sequential circuits

• Ripple (asynchronous) counter: n flip-flops count mod 2ⁿ; delays add up.
• Synchronous counter: all flip-flops on one clock.
• Ring counter with n flip-flops: n states. Johnson (twisted ring) counter: 2n states.
• Maximum clock of a ripple counter ≈ 1/(n × t_pd).

Data converters

• n-bit DAC: resolution = V_ref/(2ⁿ − 1) (or V_ref/2ⁿ depending on convention). R-2R ladder DACs need only two resistor values.
• ADCs: flash (fastest, 2ⁿ − 1 comparators), successive approximation (n clock cycles), dual slope (noise immune), counter type.

Worked example

An 8-bit DAC has a 5 V reference.

• Resolution = 5/255 = 19.6 mV; input 1000 0000 gives 128 × 19.6 mV = 2.51 V.

Practice