State Machine Design and Programmable Logic

Designing synchronous sequential circuits from a word problem: state diagrams, state tables, state assignment and minimisation, Mealy and Moore circuits, and memories and programmable logic (ROM, PLA, PAL, FPGA).

Counters are one kind of sequential circuit. In general, a finite state machine (FSM) circuit remembers its history in flip-flops and changes state on each clock edge. This lesson shows the complete design method, then the programmable chips used to build logic.

Design steps

Word descriptionDraw the state diagram (Mealy or Moore)Write the state tableMinimise states (merge equivalent states)Assign binary codes to statesUse flip-flop excitation tables to get input equationsMinimise the equations (K-maps)Draw the circuitgateshala.com
Designing a synchronous sequential circuit
  • n states need at least ⌈log₂ n⌉ flip-flops.
  • State minimisation: two states are equivalent if, for every input, they give the same output and go to equivalent states (the same partition method as DFA minimisation).
  • State assignment: binary, Gray code (adjacent states differ in one bit) or one-hot (one flip-flop per state, simpler logic, more flip-flops).

Example: detect two 1s in a row (Moore)

States: A (no 1 yet), B (last input 1), C (last two inputs 1, output 1).

Present stateNext state (x = 0)Next state (x = 1)Output
AAB0
BAC0
CAC1

Three states need 2 flip-flops. With D flip-flops, the next-state table gives the D inputs directly.

010110ABCgateshala.com
Moore machine that outputs 1 after two consecutive 1s

The same behaviour as a Mealy machine needs only 2 states, because the output can be produced on the transition. See Mealy and Moore Machines.

Memories

  • ROM (read-only memory) with n address lines and m data lines stores a 2ⁿ × m truth table: it can implement any m functions of n variables, by storing the truth table.
  • Types: mask ROM, PROM (one-time programmable), EPROM (UV erasable), EEPROM and Flash (electrically erasable).
  • RAM: SRAM (flip-flop cells, fast, used in caches) and DRAM (capacitor cells, dense, needs refresh, used in main memory).
  • Capacity: a memory with A address lines and D data lines holds 2ᴬ × D bits.

Programmable logic devices

DeviceAND arrayOR arrayNotes
ROMFixed (full decoder: all 2ⁿ minterms)ProgrammableAny function, but large
PLAProgrammableProgrammableShares product terms between outputs
PALProgrammableFixedCheaper and faster than PLA
FPGALook-up tables (LUTs) + programmable routing—Implements large designs; reconfigurable

A full adder stored in a ROM, and the detector simulated

rom = []
for address in range(8):                       # address bits: a b c
    a, b, c = address >> 2 & 1, address >> 1 & 1, address & 1
    total = a ^ b ^ c                          # sum
    carry = (a & b) | (b & c) | (a & c)
    rom.append((total, carry))
print("ROM contents (address: sum carry):")
for address, (s, cy) in enumerate(rom):
    print(f"{address:03b}: {s} {cy}")

next_state = {"A": {"0": "A", "1": "B"},       # the Moore 11-detector
              "B": {"0": "A", "1": "C"},
              "C": {"0": "A", "1": "C"}}
state, out = "A", ""
for x in "0110111010":
    state = next_state[state][x]
    out += "1" if state == "C" else "0"
print("11-detector output:", out)
Output
ROM contents (address: sum carry):
000: 0 0
001: 1 0
010: 1 0
011: 0 1
100: 1 0
101: 0 1
110: 0 1
111: 1 1
11-detector output: 0010011000

GATE-style practice questions

GATE-styleNAT · numerical answer

A sequential circuit has 11 states. What is the minimum number of flip-flops needed?

Show answer and explanationAnswer: 4

2³ = 8 < 11 ≤ 16 = 2⁴, so 4 flip-flops.

GATE-styleNAT · numerical answer

A ROM must implement 4 functions of 6 variables. What is its size in bits?

Show answer and explanationAnswer: 256

2⁶ addresses × 4 bits each = 256 bits.

GATE-styleNAT · numerical answer

How many address lines does a 4K × 8 memory chip need?

Show answer and explanationAnswer: 12

4K = 4096 = 2¹² words, so 12 address lines.

GATE-styleMCQ · one correct answer

In which device are both the AND array and the OR array programmable?

Show answer and explanationAnswer: B

A ROM has a fixed AND array (all minterms), a PAL a fixed OR array; a PLA programs both.

GATE-styleNAT · numerical answer

With one-hot state assignment, a machine with 6 states uses how many flip-flops?

Show answer and explanationAnswer: 6

One-hot uses one flip-flop per state (binary encoding would need only 3).